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Pinmux

SoC(System on Chip) control peripherals and interact with data through IO pins. The W80X series of SoC come in different packages, offering varying numbers of IO pins. An example is provided below with the pinout diagram of the W800:

Considering the relationship between chip package area and cost, the number of chip pins is limited as much as possible. To support more functions, some pins are multiplexed for multiple purposes, which is also known as pinmux, as introduced in the current chapter.

IO pinmux definition is crucial in project development but can easily lead to confusion. When obtaining a new platform or initiating new device functions, it is often necessary to first configure the pinmux parameters in the SDK based on the project’s functional requirements and in combination with the hardware engineer’s schematic. This is a prerequisite for the proper operation of related device drivers. To avoid confusion, attention can be paid to the following aspects:

Note

1.Ensure that the chip specification book referred to is consistent with the SoC selected for the project.

2.Be cautious that the IO configured in the device table does not exceed the support range of the selected SoC. It is recommended to use pin enumeration definitions when configuring pins so that the compilation system can check for validity.

3.Be aware of whether the IO configured in the device table is redundantly defined in multiple devices.

4.Verify whether the IO attribute configurations in the device table are correct (such as pullup/pulldown, input/output direction, etc.).

5.Check whether the newly added application software in the project has issues similar to those mentioned in points 2, 3, and 4.

In the future, we will improve and provide ways to assist users in detecting these errors in advance.

The following tables are more intuitive Pinmux Tables compiled based on the chip specification books of the W80X series SoC.

The pinmux function multiplexing relationships for W800 and W805 chips

GPIO_NUM	PadName	FUN1	FUN2	FUN3	FUN4	FUN5	FUN6	FUN7
WM_GPIO_NUM_0	PA0	I2S_MCLK	L-SPI_CS	PWM2	I2S_DO	GPIO
WM_GPIO_NUM_1	PA1	JTAG_CK	I2C_SCL	PWM3	I2S_LRCLK	GPIO	ADC_0
WM_GPIO_NUM_4	PA4	JTAG_SWO	I2C_SDA	PWM4	I2S_BCLK	GPIO	ADC_1
WM_GPIO_NUM_7	PA7	PWM4	L-SPI_MOSI	I2S_MCLK	I2S_DI	GPIO
WM_GPIO_NUM_16	PB0	PWM0	L-SPI_MISO	UART3_TX	PSRAM_CK	GPIO
WM_GPIO_NUM_17	PB1	PWM1	L-SPI_CK	UART3_RX	PSRAM_CS	GPIO
WM_GPIO_NUM_18	PB2	PWM2	L-SPI_CK	UART2_TX	PSRAM_DAT0	GPIO
WM_GPIO_NUM_19	PB3	PWM3	L-SPI_MISO	UART2_RX	PSRAM_DAT1	GPIO
WM_GPIO_NUM_20	PB4	L-SPI_CS	UART2_RTS	UART4_TX	PSRAM_DAT2	GPIO
WM_GPIO_NUM_21	PB5	L-SPI_MOSI	UART2_CTS	UART4_RX	PSRAM_DAT3	GPIO
WM_GPIO_NUM_22	PB6	UART1_TX	MMC_CLK	H-SPI_CK	SDIO_SLAVE_CK	GPIO
WM_GPIO_NUM_23	PB7	UART1_RX	MMC_CMD	H-SPI_INT	SDIO_SLAVE_CMD	GPIO
WM_GPIO_NUM_24	PB8	I2S_BCLK	MMC_DAT0	PWM_BREAK	SDIO_SLAVE_D0	GPIO
WM_GPIO_NUM_25	PB9	I2S_LRCLK	MMC_DAT1	H-SPI_CS	SDIO_SLAVE_D1	GPIO
WM_GPIO_NUM_26	PB10	I2S_DI	MMC_DAT2	H-SPI_DI	SDIO_SLAVE_D2	GPIO
WM_GPIO_NUM_27	PB11	I2S_D0	MMC_DAT3	H-SPI_DO	SDIO_SLAVE_D3	GPIO
WM_GPIO_NUM_35	PB19	UART0_TX	PWM0	UART1_RTS	I2C_SDA	GPIO
WM_GPIO_NUM_36	PB20	UART0_RX	PWM1	UART1_CTS	I2C_SCL	GPIO

The pinmux function multiplexing relationships for W801S chip

GPIO_NUM	PadName	FUN1	FUN2	FUN3	FUN4	FUN5	FUN6	FUN7
WM_GPIO_NUM_0	PA0	I2S_MCLK	L-SPI_CS	PWM2	I2S_DO	GPIO
WM_GPIO_NUM_1	PA1	JTAG_CK	I2C_SCL	PWM3	I2S_LRCLK	GPIO	ADC_0
WM_GPIO_NUM_2	PA2	UART1_RTS	UART2_TX	PWM0	UART3_RTS	GPIO	ADC_3
WM_GPIO_NUM_3	PA3	UART1_CTS	UART2_RX	PWM1	UART3_CTS	GPIO	ADC_2
WM_GPIO_NUM_4	PA4	JTAG_SWO	I2C_SDA	PWM4	I2S_BCLK	GPIO	ADC_1
WM_GPIO_NUM_5	PA5	UART3_TX	UART2_RTS	PWM_BREAK	UART4_RTS	GPIO
WM_GPIO_NUM_6	PA6	UART3_RX	UART2_CTS		UART4_CTS	GPIO	LCD_SEG31
WM_GPIO_NUM_7	PA7	PWM4	L-SPI_MOSI	I2S_MCLK	I2S_DI	GPIO	LCD_SEG03
WM_GPIO_NUM_8	PA8	PWM_BREAK	UART4_TX	UART5_TX	I2S_BCLK	GPIO	LCD_SEG04
WM_GPIO_NUM_9	PA9	MMC_CLK	UART4_RX	UART5_RX	I2S_LRCLK	GPIO	LCD_SEG05	Touch1
WM_GPIO_NUM_10	PA10	MMC_CMD	UART4_RTS	PWM0	I2S_DO	GPIO	LCD_SEG06	Touch2
WM_GPIO_NUM_11	PA11	MMC_DAT0	UART4_CTS	PWM1	I2S_DI	GPIO	LCD_SEG07
WM_GPIO_NUM_12	PA12	MMC_DAT1	UART5_TX	PWM2		GPIO	LCD_SEG08	CMOD
WM_GPIO_NUM_13	PA13	MMC_DAT2	UART5_RX	PWM3		GPIO	LCD_SEG09
WM_GPIO_NUM_14	PA14	MMC_DAT3	UART5_CTS	PWM4		GPIO	LCD_SEG10	CDC
WM_GPIO_NUM_15	PA15	PSRAM_CK	UART5_RTS	PWM_BREAK		GPIO	LCD_SEG11
WM_GPIO_NUM_16	PB0	PWM0	L-SPI_MISO	UART3_TX	PSRAM_CK	GPIO	LCD_SEG12	Touch3
WM_GPIO_NUM_17	PB1	PWM1	L-SPI_CK	UART3_RX	PSRAM_CS	GPIO	LCD_SEG13	Touch4
WM_GPIO_NUM_18	PB2	PWM2	L-SPI_CK	UART2_TX	PSRAM_DAT0	GPIO	LCD_SEG14	Touch5
WM_GPIO_NUM_19	PB3	PWM3	L-SPI_MISO	UART2_RX	PSRAM_DAT1	GPIO	LCD_SEG15	Touch6
WM_GPIO_NUM_20	PB4	L-SPI_CS	UART2_RTS	UART4_TX	PSRAM_DAT2	GPIO	LCD_SEG16	Touch7
WM_GPIO_NUM_21	PB5	L-SPI_MOSI	UART2_CTS	UART4_RX	PSRAM_DAT3	GPIO	LCD_SEG17	Touch8
WM_GPIO_NUM_22	PB6	UART1_TX	MMC_CLK	H-SPI_CK	SDIO_SLAVE_CK	GPIO	LCD_SEG18	Touch9
WM_GPIO_NUM_23	PB7	UART1_RX	MMC_CMD	H-SPI_INT	SDIO_SLAVE_CMD	GPIO	LCD_SEG19	Touch10
WM_GPIO_NUM_24	PB8	I2S_BCLK	MMC_DAT0	PWM_BREAK	SDIO_SLAVE_D0	GPIO	LCD_SEG20	Touch11
WM_GPIO_NUM_25	PB9	I2S_LRCLK	MMC_DAT1	H-SPI_CS	SDIO_SLAVE_D1	GPIO	LCD_SEG21	Touch12
WM_GPIO_NUM_26	PB10	I2S_DI	MMC_DAT2	H-SPI_DI	SDIO_SLAVE_D2	GPIO	LCD_SEG22
WM_GPIO_NUM_27	PB11	I2S_D0	MMC_DAT3	H-SPI_DO	SDIO_SLAVE_D3	GPIO	LCD_SEG23
WM_GPIO_NUM_28	PB12	H-SPI_CK	PWM0	UART5_CTS	I2S_BCLK	GPIO	LCD_SEG24
WM_GPIO_NUM_29	PB13	H-SPI_INT	PWM1	UART5_RTS	I2S_LRCLK	GPIO	LCD_SEG25
WM_GPIO_NUM_30	PB14	HSPI_CS	PWM2	L-SPI_CS	I2S_DO	GPIO	LCD_SEG26
WM_GPIO_NUM_31	PB15	HSPI_DI	PWM3	L-SPI_CK	I2S_DI	GPIO	LCD_SEG27
WM_GPIO_NUM_32	PB16	HSPI_DO	PWM4	L-SPI_MISO	UART1_RX	GPIO	LCD_SEG28
WM_GPIO_NUM_33	PB17	UART5_RX	PWM_BREAK	L-SPI_MOSI	I2S_MCLK	GPIO	LCD_SEG29
WM_GPIO_NUM_34	PB18	UART5_TX				GPIO	LCD_SEG30
WM_GPIO_NUM_35	PB19	UART0_TX	PWM0	UART1_RTS	I2C_SDA	GPIO
WM_GPIO_NUM_36	PB20	UART0_RX	PWM1	UART1_CTS	I2C_SCL	GPIO
WM_GPIO_NUM_37	PB21	UART0_RTS				GPIO	LCD_COM1
WM_GPIO_NUM_38	PB22	UART0_CTS				GPIO	LCD_COM2
WM_GPIO_NUM_40	PB24	L-SPI_CK	PWM2			GPIO	LCD_SEG2
WM_GPIO_NUM_41	PB25	L-SPI_MISO	PWM3			GPIO	LCD_COM0
WM_GPIO_NUM_42	PB26	L-SPI_MOSI	PWM4			GPIO	LCD_SEG1
WM_GPIO_NUM_43	PB27	PSRAM_CS	UART0_TX			GPIO	LCD_COM3

The pinmux function multiplexing relationships for W802 chip

GPIO_NUM	PadName	FUN1	FUN2	FUN3	FUN4	FUN5	FUN6	FUN7
WM_GPIO_NUM_0	PA0	I2S_MCLK	L-SPI_CS	PWM2	I2S_DO	GPIO
WM_GPIO_NUM_1	PA1	JTAG_CK	I2C_SCL	PWM3	I2S_LRCLK	GPIO	ADC_0
WM_GPIO_NUM_2	PA2	UART1_RTS	UART2_TX	PWM0	UART3_RTS	GPIO	ADC_3
WM_GPIO_NUM_3	PA3	UART1_CTS	UART2_RX	PWM1	UART3_CTS	GPIO	ADC_2
WM_GPIO_NUM_4	PA4	JTAG_SWO	I2C_SDA	PWM4	I2S_BCLK	GPIO	ADC_1
WM_GPIO_NUM_7	PA7	PWM4	L-SPI_MOSI	I2S_MCLK	I2S_DI	GPIO
WM_GPIO_NUM_9	PA9	MMC_CLK	UART4_RX	UART5_RX	I2S_LRCLK	GPIO		Touch1
WM_GPIO_NUM_10	PA10	MMC_CMD	UART4_RTS	PWM0	I2S_DO	GPIO		Touch2
WM_GPIO_NUM_12	PA12	MMC_DAT1	UART5_TX	PWM2		GPIO		CMOD
WM_GPIO_NUM_14	PA14	MMC_DAT3	UART5_CTS	PWM4		GPIO		CDC
WM_GPIO_NUM_16	PB0	PWM0	L-SPI_MISO	UART3_TX	PSRAM_CK	GPIO		Touch3
WM_GPIO_NUM_17	PB1	PWM1	L-SPI_CK	UART3_RX	PSRAM_CS	GPIO		Touch4
WM_GPIO_NUM_18	PB2	PWM2	L-SPI_CK	UART2_TX	PSRAM_DAT0	GPIO		Touch5
WM_GPIO_NUM_19	PB3	PWM3	L-SPI_MISO	UART2_RX	PSRAM_DAT1	GPIO		Touch6
WM_GPIO_NUM_20	PB4	L-SPI_CS	UART2_RTS	UART4_TX	PSRAM_DAT2	GPIO		Touch7
WM_GPIO_NUM_21	PB5	L-SPI_MOSI	UART2_CTS	UART4_RX	PSRAM_DAT3	GPIO		Touch8
WM_GPIO_NUM_22	PB6	UART1_TX	MMC_CLK	H-SPI_CK	SDIO_SLAVE_CK	GPIO		Touch9
WM_GPIO_NUM_23	PB7	UART1_RX	MMC_CMD	H-SPI_INT	SDIO_SLAVE_CMD	GPIO		Touch10
WM_GPIO_NUM_24	PB8	I2S_BCLK	MMC_DAT0	PWM_BREAK	SDIO_SLAVE_D0	GPIO		Touch11
WM_GPIO_NUM_25	PB9	I2S_LRCLK	MMC_DAT1	H-SPI_CS	SDIO_SLAVE_D1	GPIO		Touch12
WM_GPIO_NUM_26	PB10	I2S_DI	MMC_DAT2	H-SPI_DI	SDIO_SLAVE_D2	GPIO
WM_GPIO_NUM_27	PB11	I2S_D0	MMC_DAT3	H-SPI_DO	SDIO_SLAVE_D3	GPIO
WM_GPIO_NUM_28	PB12	H-SPI_CK	PWM0	UART5_CTS	I2S_BCLK	GPIO
WM_GPIO_NUM_29	PB13	H-SPI_INT	PWM1	UART5_RTS	I2S_LRCLK	GPIO
WM_GPIO_NUM_30	PB14	HSPI_CS	PWM2	L-SPI_CS	I2S_DO	GPIO
WM_GPIO_NUM_31	PB15	HSPI_DI	PWM3	L-SPI_CK	I2S_DI	GPIO
WM_GPIO_NUM_32	PB16	HSPI_DO	PWM4	L-SPI_MISO	UART1_RX	GPIO
WM_GPIO_NUM_33	PB17	UART5_RX	PWM_BREAK	L-SPI_MOSI	I2S_MCLK	GPIO
WM_GPIO_NUM_34	PB18	UART5_TX				GPIO
WM_GPIO_NUM_35	PB19	UART0_TX	PWM0	UART1_RTS	I2C_SDA	GPIO
WM_GPIO_NUM_36	PB20	UART0_RX	PWM1	UART1_CTS	I2C_SCL	GPIO
WM_GPIO_NUM_37	PB21	UART0_RTS				GPIO
WM_GPIO_NUM_38	PB22	UART0_CTS				GPIO
WM_GPIO_NUM_40	PB24	L-SPI_CK	PWM2			GPIO
WM_GPIO_NUM_41	PB25	L-SPI_MISO	PWM3			GPIO
WM_GPIO_NUM_42	PB26	L-SPI_MOSI	PWM4			GPIO
WM_GPIO_NUM_45	PB29	PSRAM_DAT1_1	UART0_RTS_1			GPIO		Touch15

The pinmux function multiplexing relationships for W803 chip

GPIO_NUM	PadName	FUN1	FUN2	FUN3	FUN4	FUN5	FUN6	FUN7
WM_GPIO_NUM_0	PA0	I2S_MCLK	L-SPI_CS	PWM2	I2S_DO	GPIO
WM_GPIO_NUM_1	PA1	JTAG_CK	I2C_SCL	PWM3	I2S_LRCLK	GPIO	ADC_0
WM_GPIO_NUM_4	PA4	JTAG_SWO	I2C_SDA	PWM4	I2S_BCLK	GPIO	ADC_1
WM_GPIO_NUM_7	PA7	PWM4	L-SPI_MOSI	I2S_MCLK	I2S_DI	GPIO
WM_GPIO_NUM_12	PA12		UART5_TX	PWM2		GPIO		CMOD
WM_GPIO_NUM_14	PA14		UART5_CTS	PWM4		GPIO		CDC
WM_GPIO_NUM_16	PB0	PWM0	L-SPI_MISO	UART3_TX	PSRAM_CK	GPIO		Touch3
WM_GPIO_NUM_17	PB1	PWM1	L-SPI_CK	UART3_RX	PSRAM_CS	GPIO		Touch4
WM_GPIO_NUM_18	PB2	PWM2	L-SPI_CK	UART2_TX	PSRAM_DAT0	GPIO		Touch5
WM_GPIO_NUM_19	PB3	PWM3	L-SPI_MISO	UART2_RX	PSRAM_DAT1	GPIO		Touch6
WM_GPIO_NUM_20	PB4	L-SPI_CS	UART2_RTS	UART4_TX	PSRAM_DAT2	GPIO		Touch7
WM_GPIO_NUM_21	PB5	L-SPI_MOSI	UART2_CTS	UART4_RX	PSRAM_DAT3	GPIO		Touch8
WM_GPIO_NUM_22	PB6	UART1_TX	MMC_CLK	H-SPI_CK	SDIO_SLAVE_CK	GPIO		Touch9
WM_GPIO_NUM_23	PB7	UART1_RX	MMC_CMD	H-SPI_INT	SDIO_SLAVE_CMD	GPIO		Touch10
WM_GPIO_NUM_24	PB8	I2S_BCLK	MMC_DAT0	PWM_BREAK	SDIO_SLAVE_D0	GPIO		Touch11
WM_GPIO_NUM_25	PB9	I2S_LRCLK	MMC_DAT1	H-SPI_CS	SDIO_SLAVE_D1	GPIO		Touch12
WM_GPIO_NUM_26	PB10	I2S_DI	MMC_DAT2	H-SPI_DI	SDIO_SLAVE_D2	GPIO
WM_GPIO_NUM_27	PB11	I2S_D0	MMC_DAT3	H-SPI_DO	SDIO_SLAVE_D3	GPIO
WM_GPIO_NUM_35	PB19	UART0_TX	PWM0	UART1_RTS	I2C_SDA	GPIO
WM_GPIO_NUM_36	PB20	UART0_RX	PWM1	UART1_CTS	I2C_SCL	GPIO

The pinmux function multiplexing relationships for W806 chip

GPIO_NUM	PadName	FUN1	FUN2	FUN3	FUN4	FUN5	FUN6	FUN7
WM_GPIO_NUM_0	PA0	I2S_MCLK	L-SPI_CS	PWM2	I2S_DO	GPIO
WM_GPIO_NUM_1	PA1	JTAG_CK	I2C_SCL	PWM3	I2S_LRCLK	GPIO	ADC_0
WM_GPIO_NUM_2	PA2	UART1_RTS	UART2_TX	PWM0	UART3_RTS	GPIO	ADC_3
WM_GPIO_NUM_3	PA3	UART1_CTS	UART2_RX	PWM1	UART3_CTS	GPIO	ADC_2
WM_GPIO_NUM_4	PA4	JTAG_SWO	I2C_SDA	PWM4	I2S_BCLK	GPIO	ADC_1
WM_GPIO_NUM_5	PA5	UART3_TX	UART2_RTS	PWM_BREAK	UART4_RTS	GPIO
WM_GPIO_NUM_6	PA6	UART3_RX	UART2_CTS		UART4_CTS	GPIO	LCD_SEG31
WM_GPIO_NUM_7	PA7	PWM4	L-SPI_MOSI	I2S_MCLK	I2S_DI	GPIO	LCD_SEG03
WM_GPIO_NUM_8	PA8	PWM_BREAK	UART4_TX	UART5_TX	I2S_BCLK	GPIO	LCD_SEG04
WM_GPIO_NUM_9	PA9	MMC_CLK	UART4_RX	UART5_RX	I2S_LRCLK	GPIO	LCD_SEG05
WM_GPIO_NUM_10	PA10	MMC_CMD	UART4_RTS	PWM0	I2S_DO	GPIO	LCD_SEG06
WM_GPIO_NUM_11	PA11	MMC_DAT0	UART4_CTS	PWM1	I2S_DI	GPIO	LCD_SEG07
WM_GPIO_NUM_12	PA12	MMC_DAT1	UART5_TX	PWM2		GPIO	LCD_SEG08
WM_GPIO_NUM_13	PA13	MMC_DAT2	UART5_RX	PWM3		GPIO	LCD_SEG09
WM_GPIO_NUM_14	PA14	MMC_DAT3	UART5_CTS	PWM4		GPIO	LCD_SEG10
WM_GPIO_NUM_15	PA15	PSRAM_CK	UART5_RTS	PWM_BREAK		GPIO	LCD_SEG11
WM_GPIO_NUM_16	PB0	PWM0	L-SPI_MISO	UART3_TX	PSRAM_CK	GPIO	LCD_SEG12
WM_GPIO_NUM_17	PB1	PWM1	L-SPI_CK	UART3_RX	PSRAM_CS	GPIO	LCD_SEG13
WM_GPIO_NUM_18	PB2	PWM2	L-SPI_CK	UART2_TX	PSRAM_DAT0	GPIO	LCD_SEG14
WM_GPIO_NUM_19	PB3	PWM3	L-SPI_MISO	UART2_RX	PSRAM_DAT1	GPIO	LCD_SEG15
WM_GPIO_NUM_20	PB4	L-SPI_CS	UART2_RTS	UART4_TX	PSRAM_DAT2	GPIO	LCD_SEG16
WM_GPIO_NUM_21	PB5	L-SPI_MOSI	UART2_CTS	UART4_RX	PSRAM_DAT3	GPIO	LCD_SEG17
WM_GPIO_NUM_22	PB6	UART1_TX	MMC_CLK	H-SPI_CK	SDIO_SLAVE_CK	GPIO	LCD_SEG18
WM_GPIO_NUM_23	PB7	UART1_RX	MMC_CMD	H-SPI_INT	SDIO_SLAVE_CMD	GPIO	LCD_SEG19
WM_GPIO_NUM_24	PB8	I2S_BCLK	MMC_DAT0	PWM_BREAK	SDIO_SLAVE_D0	GPIO	LCD_SEG20
WM_GPIO_NUM_25	PB9	I2S_LRCLK	MMC_DAT1	H-SPI_CS	SDIO_SLAVE_D1	GPIO	LCD_SEG21
WM_GPIO_NUM_26	PB10	I2S_DI	MMC_DAT2	H-SPI_DI	SDIO_SLAVE_D2	GPIO	LCD_SEG22
WM_GPIO_NUM_27	PB11	I2S_D0	MMC_DAT3	H-SPI_DO	SDIO_SLAVE_D3	GPIO	LCD_SEG23
WM_GPIO_NUM_28	PB12	H-SPI_CK	PWM0	UART5_CTS	I2S_BCLK	GPIO	LCD_SEG24
WM_GPIO_NUM_29	PB13	H-SPI_INT	PWM1	UART5_RTS	I2S_LRCLK	GPIO	LCD_SEG25
WM_GPIO_NUM_30	PB14	HSPI_CS	PWM2	L-SPI_CS	I2S_DO	GPIO	LCD_SEG26
WM_GPIO_NUM_31	PB15	HSPI_DI	PWM3	L-SPI_CK	I2S_DI	GPIO	LCD_SEG27
WM_GPIO_NUM_32	PB16	HSPI_DO	PWM4	L-SPI_MISO	UART1_RX	GPIO	LCD_SEG28
WM_GPIO_NUM_33	PB17	UART5_RX	PWM_BREAK	L-SPI_MOSI	I2S_MCLK	GPIO	LCD_SEG29
WM_GPIO_NUM_34	PB18	UART5_TX				GPIO	LCD_SEG30
WM_GPIO_NUM_35	PB19	UART0_TX	PWM0	UART1_RTS	I2C_SDA	GPIO
WM_GPIO_NUM_36	PB20	UART0_RX	PWM1	UART1_CTS	I2C_SCL	GPIO
WM_GPIO_NUM_37	PB21	UART0_RTS				GPIO	LCD_COM1
WM_GPIO_NUM_38	PB22	UART0_CTS				GPIO	LCD_COM2
WM_GPIO_NUM_40	PB24	L-SPI_CK	PWM2			GPIO	LCD_SEG2
WM_GPIO_NUM_41	PB25	L-SPI_MISO	PWM3			GPIO	LCD_COM0
WM_GPIO_NUM_42	PB26	L-SPI_MOSI	PWM4			GPIO	LCD_SEG1
WM_GPIO_NUM_43	PB27	PSRAM_CS	UART0_TX			GPIO	LCD_COM3

The requirements for setting the attributes of pins for IO function

By configuring pinmux, the IO can be selected to perform different functions, and some of these functions have specific requirements for the attributes of the pins. The following table summarizes the specific IO attribute requirements for each IO function of the W80X SoC:

IO Function	Sub-Function Requirements	Pullmode	Direction
LCD_SEG		FLOAT	INPUT
LCD_COM		FLOAT	INPUT
ADC		FLOAT	INPUT
Touch		FLOAT	INPUT
I2C_SDA		PULLUP	Irrelevant
I2C_SCL		PULLUP	Irrelevant
PWM_BREAK	High Level Trigger	PULLDOWN	Irrelevant
PWM_BREAK	Low Level Trigger	PULLUP	Irrelevant
UART RX		PULLUP	Irrelevant
GPIO	Input	PULLUP/DOWN/FLOAT	INPUT
GPIO	Output	Irrelevant	OUTPUT
I2S_LRCLK	Sequence L->R	PULLUP	Irrelevant
I2S_LRCLK	Sequence R->L	PULLDOWN	Irrelevant
I2S BCLK/DI/DO		Irrelevant	Irrelevant
SDIO		Irrelevant	Irrelevant
HSPI		Irrelevant	Irrelevant
SIM		Irrelevant	Irrelevant
PWM		Irrelevant	Irrelevant
MMC		Irrelevant	Irrelevant
Uart TX/RTS/CTS		Irrelevant	Irrelevant
JTAG		Irrelevant	Irrelevant

For example, WM_GPIO_NUM_1 is configured as FUN6, which corresponds to the ADC function. Additionally, it is necessary to set the IO attribute to FLOAT and configure the GPIO Direction as INPUT.

Note

1.Upon power-on, all IOs on the W80X series SoC are defaulted to a Floating, Input state.

2.When configuring an IO to FUN6 or FUN7, this IO is set to an analog function. Under such conditions, the Pullmode of this IO should not be set to pullup, as it may cause damage to the chip in some environments.

3.For PWM applications, attention should be paid to IO configuration. Each channel should only have one pin function configured to maintain a single output path. If multiple pins are set to the same PWM channel (for example, both GPIO2 and GPIO10 are set to PWM0), all these pins will output the PWM0 waveform.