DMA Demo
Overview
After starting this application, perform the following actions:
Initialize DMA
Start the thread and perform DMA related operations in the thread, including interrupt normal mode, linked list mode, loop mode, and non interrupt blocking mode
The thread will continue to execute in a loop
Environmental Requirements
The DMA configuration has been completed in the device tree. If you need to make any changes, you can modify the corresponding device tree settings.
Building and Flashing
Example Location： examples/peripheral/dma
For operations such as compiling and burning, please refer to: Quick Start Guide
Running Result
The following log is displayed after successful operation
W800: I/DMA DRV M2M DEMO [0.094] drv dma mem <-----> mem transfer demo, with different dma feature combinations
D/HEX [before dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
I/DMA DRV M2M DEMO [0.240] ------start dma example: dma demo, dma interrupt without list mode ------
I/DMA DRV M2M DEMO [0.248] src 20001694
I/DMA DRV M2M DEMO [0.252] dest 20001560
I/DMA DRV M2M DEMO [0.256] len 96
I/DMA DRV M2M DEMO [0.260] ch 0
I/DMA DRV M2M DEMO [0.262] src_inc_mode 1
I/DMA DRV M2M DEMO [0.266] dest_inc_mode 1
I/DMA DRV M2M DEMO [0.270] int_en 1
I/DMA DRV M2M DEMO [0.274] auto_reload 0
I/DMA DRV M2M DEMO [0.278] dma_mode 0
I/DMA DRV M2M DEMO [0.280] src_warp_len 0
I/DMA DRV M2M DEMO [0.284] dest_warp_len 0
I/dma [0.288] busrt 1 unit 0
[16:12:44.349]收←◆D/HEX [after dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [before dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
I/DMA DRV M2M DEMO [0.662] ------start dma example: dma demo, dma polling without list mode ------
I/dma [0.672] busrt 1 unit 0
D/HEX [after dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
I/DMA DRV M2M DEMO [0.810] dma m2m xfer demo finish with success
D/HEX [before dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A EE EE EE EE EE EE :::::::::......
D/HEX [before dma]dma_m2m src data:: 001E-002C: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [before dma]dma_m2m src data:: 002D-003B: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [before dma]dma_m2m src data:: 003C-004A: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [before dma]dma_m2m src data:: 004B-0059: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [before dma]dma_m2m src data:: 005A-0068: EE EE EE EE EE EE ......
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
D/HEX [before dma]dma_m2m dest buf ref:: 0000-000E: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [before dma]dma_m2m dest buf ref:: 000F-001D: EE EE EE EE EE EE EE EE EE 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf ref:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf ref:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf ref:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf ref:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf ref:: 005A-0068: 00 00 00 00 00 00 ......
I/DMA DRV M2M DEMO [1.024] ------start dma example: dma demo, dma interrupt with warp mode ------
I/dma [1.032] busrt 1 unit 0
[16:12:45.093]收←◆D/HEX [after dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A EE EE EE EE EE EE :::::::::......
D/HEX [after dma]dma_m2m src data:: 001E-002C: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m src data:: 002D-003B: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m src data:: 003C-004A: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m src data:: 004B-0059: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m src data:: 005A-0068: EE EE EE EE EE EE ......
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: EE EE EE EE EE EE EE EE EE 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
D/HEX [after dma]dma_m2m dest buf ref:: 0000-000E: EE EE EE EE EE EE EE EE EE EE EE EE EE EE EE ...............
D/HEX [after dma]dma_m2m dest buf ref:: 000F-001D: EE EE EE EE EE EE EE EE EE 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf ref:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf ref:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf ref:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf ref:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [after dma]dma_m2m dest buf ref:: 005A-0068: 00 00 00 00 00 00 ......
D/HEX [before dma]dma_m2m src data:: 0000-000E: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 000F-001D: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 001E-002C: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 002D-003B: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 003C-004A: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 004B-0059: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [before dma]dma_m2m src data:: 005A-0068: 66 66 66 66 66 66 ffffff
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
D/HEX [before dma]dma_m2m src data:: 0000-000E: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 000F-001D: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 001E-002C: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 002D-003B: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 003C-004A: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 004B-0059: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [before dma]dma_m2m src data:: 005A-0068: 67 67 67 67 67 67 gggggg
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
I/DMA DRV M2M DEMO [1.614] ------start dma example: dma demo, dma interrupt with list mode ------
I/dma [1.622] busrt 1 unit 0
I/dma [1.626] busrt 1 unit 0
[16:12:45.686]收←◆D/HEX [after dma]dma_m2m src data:: 0000-000E: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 000F-001D: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 001E-002C: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 002D-003B: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 003C-004A: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 004B-0059: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m src data:: 005A-0068: 66 66 66 66 66 66 ffffff
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 fffffffffffffff
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 66 66 66 66 66 66 ffffff
D/HEX [after dma]dma_m2m src data:: 0000-000E: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 000F-001D: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 001E-002C: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 002D-003B: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 003C-004A: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 004B-0059: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m src data:: 005A-0068: 67 67 67 67 67 67 gggggg
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 67 67 67 67 67 67 67 67 67 67 67 67 67 67 67 ggggggggggggggg
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 67 67 67 67 67 67 gggggg
D/HEX [before dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [before dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [before dma]dma_m2m dest buf:: 0000-000E: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 000F-001D: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 001E-002C: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 002D-003B: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 003C-004A: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 004B-0059: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...............
D/HEX [before dma]dma_m2m dest buf:: 005A-0068: 00 00 00 00 00 00 ......
I/DMA DRV M2M DEMO [2.136] ------start dma example: dma demo, dma interrupt without list mode transfer api------
I/dma [2.146] busrt 1 unit 0
[16:12:46.207]收←◆D/HEX [after dma]dma_m2m src data:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m src data:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
D/HEX [after dma]dma_m2m dest buf:: 0000-000E: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 000F-001D: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 001E-002C: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 002D-003B: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 003C-004A: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 004B-0059: 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A :::::::::::::::
D/HEX [after dma]dma_m2m dest buf:: 005A-0068: 3A 3A 3A 3A 3A 3A ::::::
I/DMA DRV M2M DEMO [2.384] dma demo done! count 0